ESD protection network for IGFET circuits with SCR prevention guard rings
US4757363A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 3, 1986 |
| Grant date | Jul 12, 1988 |
| Priority date | — |
| Expiry date | Oct 3, 2006 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/601
Abstract
An input resistor-diode protection circuit having an input resistor formed by a high impurity region within a deeper low impurity region, both a first conductivity type and input diode formed by the junction of the low impurity resistor region and the substrate along a substantial portion and a high impurity region overlapping the low impurity region at the output end of the resistor-diode circuit, both of a second conductivity type. A bipolar transistor connected to the output of the resistor in parallel to the diode also provides protection. A pair of concentric guard rings of first and second conductivity type laterally encompasses the input protection circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.