Memory circuit
US4757473A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 21, 1986 |
| Grant date | Jul 12, 1988 |
| Priority date | — |
| Expiry date | May 21, 2006 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/16
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A dual-port memory circuit comprises a random port having a memory cell array randomly accessable and a serial port serially readable or writable from/to the memory cell array. In the memory circuit, two modes are provided to the serial port, and when a first mode is designated, the data are consecutively read or written a plurality of bits at a time, and when a second mode is designated, the data are consecutively read or written one bit at a time. High speed read/write operation is attained by designating the mode to allow parallel input/output. For an application which does not require high speed operation, the number of components to be externally added to the memory circuit can be reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.