User programmable integrated circuit interconnect architecture and test method
US4758745A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 19, 1986 |
| Grant date | Jul 19, 1988 |
| Priority date | — |
| Expiry date | Sep 19, 2006 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/17796
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A user-programmable interconnect architecture, which may be used for logic arrays for digital and analog system design, is disclosed. In one embodiment, a plurality of logic cells or modules in a matrix are connected by vertical and horizontal wiring channels. The wiring channels may in turn be programmed by the user to interconnect the various logic cells to implement the required logic function. The wiring channels comprise wiring segments connected by normally open programmable elements situated at the intersection of any two segments to be connected. Sensing circuitry and wiring may be included to allow 100% observability of internal circuit nodes, such as module outputs, from an external pad interface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.