Process and apparatus for the synchronization of square signals
US4760280A · kind A · utility
5Cited by
4References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 18, 1986 |
| Grant date | Jul 26, 1988 |
| Priority date | — |
| Expiry date | Jun 18, 2006 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01B7/00
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A process and apparatus for improving the resolution of square, subdivided signals by synchronizing the signals with an auxiliary clock signal. The signals are further conditioned by switching logic elements which, in dependence upon adjacent signals in the subdivision order and upon the auxiliary clock signal, only allow the states of the signals to change at predefined times.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.