Decompaction of stored data in automatic test systems
US4760377A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Mar 29, 1985 |
| Grant date | Jul 26, 1988 |
| Priority date | — |
| Expiry date | Mar 29, 2005 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31924
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Disclosed is a decompaction system for reading compacted paralled data from a memory and providing in real time uncompacted serial data therefrom. The decompaction system is especially suited to be utilized in pin electronics automatic test equipment for real time testing of units such as integrated circuits, circuit boards, etc. The decompaction system includes a separate channel for each pin of the unit under test (UUT) and is capable of decoding a number of types of compacted parallel data and providing serail data to each pin of the UUT in the most prevalently used test patterns. The data is compacted by software algorithms according to these patterns, stored in a memory and retrieved and decoded by the decompaction system during real-time testing of the UUT. In a specific embodiment, compacted parallel data is stored in 16-bit words in a separate memory for each channel, and is decompacted into serial data sequences of from 8 to 4096 bits per channel for each access of the respective memory. Thus, supplying of serial test data to the UUT is enhanced over the access time of the memory by as much as 256 times. In addition, it is not necessary to interrupt testing to refill the m…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.