Thirty-two bit, bit slice processor
US4760517A · kind A · utility
21Cited by
3References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 17, 1986 |
| Grant date | Jul 26, 1988 |
| Priority date | — |
| Expiry date | Oct 17, 2006 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/7896
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The combination of a seven-port random access memory (RAM) unit, a funnel shifter, a mask generator, an arithmetic logic unit (ALU), a merge logic unit, a number of multiplexers, and three bi-directional data buses are configured to form a thirty-two bit, cascadable, microprogrammable, bit-slice suitable for executing complex operations such as those which require that several operands be read from the memory unit, be rotated in the funnel shifter, be operated upon by the arithmetic logic unit, be merged in the merge logic unit, and the result be written back into the memory unit all in a single cycle.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.