Transmission and reception of synchronous data and timing signals using a steady bit stream
US4763318A · kind A · utility
3Cited by
8References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 2, 1986 |
| Grant date | Aug 9, 1988 |
| Priority date | — |
| Expiry date | May 2, 2006 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/068
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
In an telecommunications switching system, user clock data is "massively sampled" at the source node with reference to a global clock signal, and reconstructed with no more than allowable error at the destination. Massive sampling and reconstruction of the clock signal allows users of the transmission system to send data at arbitrary data rates and to perform their own clock synchronization at a different protocol level from the hardware switching system. Direct use of the global system clock rate of approximately 192 kilobits per second (kbps) is provided for by synchronizing the user data with the global clock signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.