Viterbi decoder and method for testing the viterbi decoder
US4763328A · kind A · utility
17Cited by
4References
3Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 16, 1986 |
| Grant date | Aug 9, 1988 |
| Priority date | — |
| Expiry date | Oct 16, 2006 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/41
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An integrated viterbi decoder structure and method, the viterbi decoder receives test input signals at a distributor, an ACS circuit and a path memory and compares the output signals generated by the test input signals with predetermined test signals so as to test the internal operations of the viterbi decoder without the need for complex logic housed with the viterbi decoder.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.