Frequency synthesizer having digital phase detector with optimal steering and level-type lock indication
US4764737A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 20, 1987 |
| Grant date | Aug 16, 1988 |
| Priority date | — |
| Expiry date | Nov 20, 2007 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S331/02
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
For use in a radio synthesizer (110), a digital phase detector (118) indicates the phase error between a reference signal provided by a reference oscillator (117) and an output frequency signal (114) provided by a voltage controlled oscillator (112). The digital phase detector (118) includes four flip/flops (310, 312, 314 and 316) which receive the frequency signals (116 and 120) provided by the oscillators (117 and 112) to generate steering signals (126) which optimally indicate the phase error between the frequency signals (116 and 120) as well as providing optimal (maximum) frequency steering when a frequency difference between the frequency signals (116 and 120) exists. Responsive to the flip/flops, digital logic circuitry (306) is used to provide a non-integrated level-type indication when the frequency signals (116 and 120) are phase locked.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.