Intruder detection system with false-alarm-minimizing circuitry
US4764755A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 27, 1987 |
| Grant date | Aug 16, 1988 |
| Priority date | — |
| Expiry date | Jul 27, 2007 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S250/01
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
An intruder detection system is provided with circuitry for reducing the risk of false alarms from spurious sources. Such circuitry comprises a pulse generator for producing current pulses of predetermined pulsewidth and amplitude each time the output of an intrusion detecting element exceeds or falls belows a preset threshold level, an integrating circuit for integrating the output of the pulse generator, threshold sensing means for activating an alarm when the integrator output exceeds a preset level, and a timing circuit for establishing a predetermined time interval and for discharging the integrating circuit in the event the integrator output fails to exceed such preset level within such predetermined time interval. According to a preferred embodiment, means are provided for resetting the time interval each time the detector output exceeds or falls below the selected threshold level. By selecting a relatively short time interval and by resetting such time interval every time a potential target is detected, certain types of spurious sources are prevented from producing false alarms.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.