High speed write technique for a memory
US4764900A · kind A · utility
11Cited by
3References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 24, 1986 |
| Grant date | Aug 16, 1988 |
| Priority date | — |
| Expiry date | Mar 24, 2006 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/419
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a random access memory a write driver develops a full rail write signal which is coupled to the selected bit line pair via transmission gates. The bit lines are thus driven to full rail. This results in a faster rise time on the bit line which is driven to a logic high. With the faster rise time, the selected cell is written into more quickly with the result of a faster write time for the memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.