Programmable logic array
US4766569A · kind A · utility
123Cited by
5References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 5, 1986 |
| Grant date | Aug 23, 1988 |
| Priority date | — |
| Expiry date | Jun 5, 2006 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/318516
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A programmable logic array is disclosed employing arrays of electrically erasable and programmable cells. The device includes a dual purpose programming circuit which is employed to provide programming data to the AND array to program the AND array cells, and to provide OR array row selection data during OR array programming, thereby eliminating the need for a separate OR array row decoder. A method and apparatus is also disclosed for efficiently testing the AND array cells and input circuitry by bulk stripe programming the array cells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.