Patent · US Expired

Double layer photoresist process for well self-align and ion implantation masking

US4767721A · kind A · utility

12Cited by
6References
25Claims
0Family size

Assignee

Inventors

Key dates

Filing dateFeb 10, 1986
Grant dateAug 30, 1988
Priority date
Expiry dateFeb 10, 2006

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY10S438/951
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A technique is disclosed for obtaining a self-aligned twin-well structure in a CMOS process. A double layer of two different photoresist materials is employed to obtain an overhang photoresist structure used for the p-well masking and ion implantation process. After the p-well implantation, pure aluminum is deposited over the wafer, forming a first layer over the p-well region and a second layer over the photoresist layers. A metal lift-off procedure is performed to dissolve the photoresist layers and thereby remove the second layer of metal. The first layer of aluminum remaining on the wafer forms a conjugate of the p-well pattern and serves as the n-well mask for ion implantation. The invention provides a straightforward method for achieving the self-aligned twin-well structure in CMOS processes, and is adapted to high energy ion implantation for achieving retrograde impurity profiles.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.