Electronic apparatus having a power control circuit for developing a power disconnection invalidating instruction in order to protect memory contents
US4768162A · kind A · utility
8Cited by
4References
6Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 2, 1984 |
| Grant date | Aug 30, 1988 |
| Priority date | — |
| Expiry date | Mar 2, 2004 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An electronic apparatus includes power source for supplying power, a key input unit for inputting key instructions, a memory for memorizing the key instructions, a generator for generating a power off cancel instruction to be invalidated the power-off of the power supplied from the power source in response to at least one of the key instructions or at least one of the memorized instructions memorized by the memory, a detector for detecting the output of the power off cancel instruction generator, and a controller for controlling the power source in response to the output of the detector.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.