Semiconductor device
US4769686A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 19, 1987 |
| Grant date | Sep 6, 1988 |
| Priority date | — |
| Expiry date | Jun 19, 2007 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/858
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Herein disclosed is a semiconductor device, especially, an MISFET which can ensure a high breakdown voltage and operate at a high speed. The semiconductor device according to the present invention reduces the sheet resistance by using an impurity region, which has an impurity concentration not exceeding 10.sup.20 cm.sup.-3, in a drain or source region and by forming a metal silicide layer on the surface of the impurity region. Moreover, the semiconductor device of the present invention is constructed such that the impurity concentration of an n-type drain or source region does not exceed 10.sup.20 cm.sup.-3 whereas the impurity concentration of a p-type drain or source region does not exceed 10.sup.19 cm.sup.-3 and such that at least one portion of the drain or source region is made of a metal silicide so that it can effectively protect the latch-up phenomenon which is caused when two or more semiconductor devices of different conductive type are integrated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.