Patent · US Expired

Stress relief in epitaxial wafers

US4769689A · kind A · utility

17Cited by
1References
4Claims
0Family size

Assignee

Inventor

Key dates

Filing dateJul 13, 1987
Grant dateSep 6, 1988
Priority date
Expiry dateJul 13, 2007

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L21/02381
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

The specification describes an epitaxial structure designed to reduce or eliminate the bowing of semiconductor wafers due to stresses caused by lattice mismatch between a heavily boron doped substrate and a lightly doped epitaxial layer. The lattice mismatch is reduced or eliminated by doping germanium into the substrate prior to epitaxial growth.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.