Pipelined data processing system utilizing ideal floating point execution condition detection
US4773035A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 19, 1984 |
| Grant date | Sep 20, 1988 |
| Priority date | — |
| Expiry date | Oct 19, 2004 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2207/3884
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An instruction execution unit receives instructions and, in turn, provides a sequence of control words to specify the sequential processing of the operand data provided with the instruction. A sequencer nominally issues a first sequence of control words corresponding to the instruction. The sequencer includes a sequence selector for selecting a second sequence of control words for issuance by the sequencer. Control logic is provided to determine from the operand data, concurrent with the issuance of at least the first issued control word, whether the operand data is ideal with respect to the instruction, where ideal is defined as the predicted nonoccurence of underflow and overflow conditions. On determining that the operand data is ideal with respect to the instruction, the sequence selector is caused to select the second sequence of control words for issuance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.