Frequency adaptive phase jitter canceler
US4777640A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 9, 1986 |
| Grant date | Oct 11, 1988 |
| Priority date | — |
| Expiry date | Jun 9, 2006 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L27/3818
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A modem receiver circuit comprises one or more phase jitter canceling circuits for reducing sinusoidal components of phase jitter in a telecommunications channel. The receiver circuit automatically tracks multiple sinusoidal frequency components and jitter components varying slowly in amplitude and frequency. Each phase jitter canceling circuit is responsive to a phase angle error signal, which is scaled by an adaptive gain constant and appropriately signed. The corrected error signal is passed through a second order loop filter which contains an accumulator with a jitter frequency estimate. The output is integrated into an estimate of the phase of the sinusoidal jitter, which is converted into an estimate of the jitter angle by using a sine lookup table. The resulting estimated jitter component angle is added to the carrier loop phase angle estimate to derive a total receiver phase estimate. The circuit provides rapid acquisition of an accurate initial estimate for the jitter component. It also decouples the operation of the jitter canceling circuitry from the existing carrier phase loop circuitry to avoid harmful interactions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.