Level conversion circuit
US4779016A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 6, 1987 |
| Grant date | Oct 18, 1988 |
| Priority date | — |
| Expiry date | Jan 6, 2007 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/017527
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Level conversion circuit for converting ECL logic level signals to CMOS logic level signals. The level conversion circuit includes: a differential amplifier circuit, which has a bipolar transistor of which the base terminal is connected to an input terminal and a bipolar transistor of which the base terminal is connected to a bias source, and which selects a current path from a high voltage source to a low voltage source; an MOS type transistor whose conduction is controlled by current flowing through the collector terminal of one of said bipolar transistors; a P-channel MOS type transistor, connected between the high voltage source and an output terminal, whose conduction is controlled either by the collector terminal current flowing through the collector terminal of the other of said bipolar transistors or by the drain terminal current flowing between the source termial and the drain terminal of said MOS transistor; and an N-channel MOS type transitor, connected between the low voltage source and the output terminal, whose conduction is controlled either said collector terminal current or by said drain terminal current.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.