Electrical interface arrangement
US4780086A · kind A · utility
22Cited by
5References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 23, 1987 |
| Grant date | Oct 25, 1988 |
| Priority date | — |
| Expiry date | Sep 23, 2007 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R1/07335
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
In an interface arrangement for automatic test equipment a substrate, such as a circuit board, is supported between spring loaded test probes within a vacuum chamber so that application of a vacuum causes the probes to contact the board. An internal dam is mounted within the vacuum chamber and, upon the application of the vacuum, seals off an internal portion of the chamber containing the probe arrays so that cooling air may be applied to the circuit board without breaking the vacuum in the outer portion of the chamber. Access may also be provided to the circuit board in this condition.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.