Frame buffer self-test
US4780755A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 26, 1987 |
| Grant date | Oct 25, 1988 |
| Priority date | — |
| Expiry date | Oct 26, 2007 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R35/002
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A color graphic display system has self-test capability for testing system elements between the frame buffer and the display monitor inputs. The DAC output analog signals are converted to a digital signal and processed to provide an output test bit, which is input to the graphics processor. Additional self-test hardware includes address and data lines from the graphics processor to the color map for directly loading test bit patterns into the color map. The system self-tests the frame buffer, shift registers and DACs by loading various predetermined test bit patterns into the frame buffer and the color map; cycling that data through the display system; reading the test bit; comparing the output test bit values to expected values; and reporting any errors detected. The system also includes a method for self-testing the refresh counter address path into the frame buffer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.