High-speed pulse swallower
US4780890A · kind A · utility
8Cited by
4References
10Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 29, 1986 |
| Grant date | Oct 25, 1988 |
| Priority date | — |
| Expiry date | Sep 29, 2006 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K23/667
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A pulse swallower 41 utilizes a local feedback loop (51 and 52) on its output flip-flop (49) enabling it to extinguish its high level output after one cycle of the clock signal being applied as an input. The other input to the pulse swallower is the swallow signal which initiates a pulse swallow cycle for eliminating a single clock pulse of the input clock (42) from appearing at the clock output (44). This configuration of a pulse swallower enables correct operation, or single pulse swallowing, to occur at frequencies of up to one-over-four.tau.(1/4.tau.) which is higher than that of conventional pulse swallowers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.