Method of making GaAs MOSFET with low source resistance yet having satisfactory leakage current by ion-implantation

US4782031A · kind A · utility

Assignee

• Matsushita Electronics Corporation · JP

Inventors

• Masahiro Hagio · Toyohashi, JP
• Shinichi Katsu · Takatsuki, JP
• Kazuhide Gohda · Nagaokakyo, JP
• Shutaro Nambu · Kyoto, JP
• Hiroshi Tsukada · Nishitokyo, JP

Key dates

• Filing date: Mar 4, 1987
• Grant date: Nov 1, 1988
• Expiry date: Mar 4, 2007

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/64

Abstract

In an FET, two first semiconductor regions of higher impurity concentration and smaller thickness, for source electrode and drain electrode, are formed in a second semiconductor region of lower impurity concentration and larger thickness for a gate electrode, thereby obtaining a low source resistance and small leak current.