Raster scan video controller with programmable prioritized sharing of display memory between update and display processes and programmable memory access termination
US4782462A · kind A · utility
25Cited by
8References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 30, 1985 |
| Grant date | Nov 1, 1988 |
| Priority date | — |
| Expiry date | Dec 30, 2005 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/04
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
In a bit-mapped display system, a logical subsystem for programmable sharing of access to a memory in a computer system among a plurality of system resources wherein various modes of operation are supported by the logic and are programmably selected by the user. The use of display memory is controlled between updating and display accesses to prevent breakup of the video image while said image is being changed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.