Input/output control technique utilizing multilevel memory structure for processor and I/O communication
US4783730A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Sep 19, 1986 |
| Grant date | Nov 8, 1988 |
| Priority date | — |
| Expiry date | Sep 19, 2006 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/167
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A multilevel communication structure controls input/output (I/O) data transfers and control functions in a computer system. Communication is achieved through shared memory structures in main memory commonly connected to each processor and each I/O adapter in the system. The levels of the communication structure are for communicating information between adapters or processors and processors, for communicating information relative to I/O control functions of an I/O device, and for specifying I/O functional operations. The information contained in the memory structures may be directly interpreted by sequencers of the I/O adapters, to achieve the I/O data transfers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.