Process for manufacturing semiconductor BICMOS device

US4784971A · kind A · utility

Assignee

• American Telephone and Telegraph Company, AT&T Bell Laboratories · US

Inventors

• Tzu-Yin Chiu · Marlboro, US
• Gen M. Chin · Marlboro, US
• Ronald. C. Hanson · Middletown, US
• Maureen Y. Lau · Keyport, US
• Kwing F. Lee · Red Bank, US
• Mark Morris · Freehold, US
• Alexander M. Voschenkov · Freehold, US

Key dates

• Filing date: May 8, 1987
• Grant date: Nov 15, 1988
• Expiry date: May 8, 2007

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y10S148/151
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A process for creating bipolar and CMOS transistors on a p-type silicon substrate is disclosed. The silicon substrate has a typical n+ buried wells and field oxide regions to isolate the individual transistor devices. In accordance with the process, stacks of material are created over the gate elements of the CMOS devices and over the emitter elements of the bipolar transistors. The stacks of material over the gate elements have a silicon dioxide gate layer in contact with the epitaxial layer of the substrate, and the stacks of material over the emitter elements have a polycrystalline silicon layer in contact with the epitaxial layer. Walls of silicon dioxide are created around the stacks in order to insulate the material within the stacks from the material deposited outside of the walls. Polycrystalline silicon in contact with the epitaxial layer is deposited outside the walls surrounding the stacks. All polycrystalline silicon layers in contact with the epitaxial layer are implanted with appropriate dopants such that these layers serve as reservoirs of dopant in order to simultaneously create the source and drain elements of the CMOS devices and the emitter elements of the bipola…