Dual FET oscillator
US4785264A · kind A · utility
1Cited by
1References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 28, 1987 |
| Grant date | Nov 15, 1988 |
| Priority date | — |
| Expiry date | May 28, 2007 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03B2200/0032
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A dual FET oscillator includes a first J-FET and a second J-FET connected to it as a source follower. A turned circuit is connected to the gate of the first J-FET and to the second J-FET. Bias voltage is supplied to both J-FET's. Schottky diodes are connected to both J-FET's to limit gate-source voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.