Encoder/decoder circuit for B8ZS and B6ZS applications
US4785466A · kind A · utility
5Cited by
5References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 18, 1987 |
| Grant date | Nov 15, 1988 |
| Priority date | — |
| Expiry date | Jun 18, 2007 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M5/18
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
The present invention comprises a circuit for providing both B8ZS and B6ZS coding and decoding selectably with a single circuit. A rate control signal can, in preferred embodiment, be utilized to select the desired line code in a application dependent manner. Advantage is taken of the fact that there is a commonality in B8ZS and B6ZS code patterns in the last five bits of the codes, with the difference being the number of logic "zeros" before the first bit of coding.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.