CMOS integrated circuit and process for producing an electric isolation zones in said integrated circuit
US4786960A · kind A · utility
30Cited by
6References
5Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 23, 1987 |
| Grant date | Nov 22, 1988 |
| Priority date | — |
| Expiry date | Jul 23, 2007 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/743
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
CMOS integrated circuit and process for the production of electric isolation zones in the integrated circuit. According to the invention the process comprises the following stages: formation of several trenches in a silicon substrate, thermal oxidation of the substrate leading to the formation of an oxide film on the sides and bottom of the trenches, elimination of the oxide film near the bottom of the trenches and filling the trenches with a conductive material, thus constituting an electrode connected to the substrate corresponding to the circuit earth.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.