Circuit for calculating the discrete Fourier transform
US4787055A · kind A · utility
14Cited by
5References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 15, 1985 |
| Grant date | Nov 22, 1988 |
| Priority date | — |
| Expiry date | Jul 15, 2005 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F17/142
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A circuit for calculating the discrete Fourier transform which includes a multiplier, two adders for effecting the calculation of the discrete Fourier transform while describing a butterfly data path, and address processors which supply the multiplier and adders with continuous data under the control of a synchronization clock. To accelerate the calculations, the processor has a memory for reducing the data access time. This memory is divided into two parts, each of which alternately plays the role of calculation memory and input/output memory for the transfer of data with a memory external to the processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.