CMOS reference voltage generator employing separate reference circuits for each output transistor
US4788455A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 1, 1986 |
| Grant date | Nov 29, 1988 |
| Priority date | — |
| Expiry date | Aug 1, 2006 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F3/24
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
An internal power supply voltage generator for generating an internal power supply voltage for a semiconductor integrated device includes first and second reference voltage generators which produce first and second reference voltages having respective values a predetermined amount above and below an optimal value of the internal power supply voltage. The first and second reference voltage generators are constructed of a pair of serially connected NMOS and PMOS transistors, respectively, which transistors are connected between an external voltage supply and ground. The first and second reference voltages are applied to a CMOS output stage constructed of a NMOS and PMOS transistor serially connected between the external voltage supply and ground, the gates of the transistors being coupled to the first and second reference voltages, so as to provide said internal power supply voltage at a common node between the transistors. This voltage generator exhibits a lowered power dissipation and a lowered output impedance, as a result of providing a CMOS output stage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.