Device for real time processing of digital signals by convolution
US4788654A · kind A · utility
2Cited by
3References
12Claims
0Family size
Inventors
Key dates
| Filing date | Sep 23, 1985 |
| Grant date | Nov 29, 1988 |
| Priority date | — |
| Expiry date | Sep 23, 2005 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F17/156
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A multipler having two inputs and one output. Each input receives a binary input signal through a block which performs an arithmetic base change and encoding and a NTT circuit. The NTT is performed with a modulus M of the form 2.sup.P -2.sup.q +1. The output is applied to a block for decoding and return to the original arithmetic base in series relation with a NTT.sup.-1 circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.