Logic gate system design
US4791578A · kind A · utility
19Cited by
7References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 30, 1986 |
| Grant date | Dec 13, 1988 |
| Priority date | — |
| Expiry date | Dec 30, 2006 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/33
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for evaluating the testability of circuit systems containing a plurality of logic gates through evaluating statistical properties in response to selected inputs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.