Semiconductor memory device with buried layer under groove capacitor
US4792834A · kind A · utility
40Cited by
3References
4Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 1, 1988 |
| Grant date | Dec 20, 1988 |
| Priority date | — |
| Expiry date | Feb 1, 2008 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/37
Abstract
Disclosed is a semiconductor memory device which has a transfer transistor of a MOS structure on a surface of a semiconductor body, and a trenched capacitor having a groove which is formed so as to extend from a surface of the semiconductor body to a certain depth thereof and an electrode which is formed from a bottom portion of the groove to at least a level above an opening of the groove, the source region of the transfer transistor being connected to the electrode of the trenched capacitor and the drain region thereof being connected to a bit line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.