Circuit arrangement for removing carriers in a transistor
US4794274A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 1, 1985 |
| Grant date | Dec 27, 1988 |
| Priority date | — |
| Expiry date | Apr 1, 2005 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/04126
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit arrangement for switching a current through the emitter-collector path of a bipolar transistor whose base receives a substantially square-wave switching signal from a switching generator via a series-arranged two-terminal network having inductive reactance. This signal switches the transistor alternately to the conducting and the non-conducting state. In such a circuit arrangement, a very short fall time of the current in the emitter-collector path of the transistor is achieved in a simple and economical way in that the value of the inductive reactance decreases when a current flowing through the two-terminal network increases.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.