Microcomputer with priority scheduling
US4794526A · kind A · utility
18Cited by
6References
23Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 3, 1985 |
| Grant date | Dec 27, 1988 |
| Priority date | — |
| Expiry date | Jul 3, 2005 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/54
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A microcomputer comprising memory 60 and a process is arranged to execute a plurality of concurrent processes and share its time between them. The microcomputer includes as register (51) for indicating a current process as well as a collection of processes awaiting execution. Each process has a memory location 66 to provide an indication of a next process in a linked list of processes. Each process has an allocated priority and a separate linked list is formed for each priority. A register (53) indicates the front of one list and a further register (52) indicates the end of that list.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.