Schilling-Manela forward error correction and detection code method and apparatus
US4796260A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 30, 1987 |
| Grant date | Jan 3, 1989 |
| Priority date | — |
| Expiry date | Mar 30, 2007 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/2918
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A Schilling-Manela encoding method is provided comprising the steps of storing a block of a data-bit sequence in a memory, calculating parity-check symbols from parity-line symbols having p-bits per symbol along parity lines, and setting the parity-check symbols equal to the modulo-2.sup.p sum of the parity-line symbols. A Schilling-Manela decoding method is provided comprising the steps of storing an encoded data-bit sequence in a memory. The encoded-data-bit sequence includes a parity-check-symbol sequence which is stored in parity-memory cells, and a data-bit sequence which is blocked and stored in information-memory cells. The parity-check symbols and the parity-line symbols along the parity lines in the information-memory cells are found. The count of each composite cell on a composite-error graph traversed by the path of each of the parity lines having an error is incremented and the largest-number cell in the composite-error graph having the largest number is determined. The largest number is compared to a threshold, and a new data symbol is chosen to minimize the count in the largest-number cell and substituted into the stored data-bit sequence.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.