Field-effect transistor having a superlattice channel and high carrier velocities at high applied fields
US4797716A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 8, 1987 |
| Grant date | Jan 10, 1989 |
| Priority date | — |
| Expiry date | Jun 8, 2007 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/4732
Abstract
A field effect transistor comprises a semiconductor having a source, a drain, a channel and a gate in operational relationship. The semiconductor is a strained layer superlattice comprising alternating quantum well and barrier layers, the quantum well layers and barrier layers being selected from the group of layer pairs consisting of InGaAs/AlGaAs, InAs/InAlGaAs, and InAs/InAlAsP. The layer thicknesses of the quantum well and barrier layers are sufficiently thin that the alternating layers constitute a superlattice which has a superlattice conduction band energy level structure in k-vector space which includes a lowest energy .GAMMA.-valley and a next lowest energy L-valley, each k-vector corresponding to one of the orthogonal directions defined by the planes of said layers and the directions perpendicular thereto. The layer thicknesses of the quantum well layers are selected to provide a superlattice L.sub.2D -valley which has a shape which is substantially more two-dimensional than that of said bulk L-valley.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.