High speed serial pixel neighborhood processor and method
US4797806A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Feb 19, 1987 |
| Grant date | Jan 10, 1989 |
| Priority date | — |
| Expiry date | Feb 19, 2007 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T5/20
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A serial pixel neighborhood processor serially receives successive rows of pixels at a 10 MHz rate, and operates on three digit by three digit pixel "neighborhoods" to serially output filtered pixels at the 10 MHz rate. The processor includes first through sixth 16 kilobit memories. Odd numbered rows of pixels are serially written into the first memory and even numbered rows of pixels are serially written into the fourth memory. Odd numbered rows of pixels in the first and second memories are serially shifted into the second and third memories, respectively, while even numbered rows of pixels are being written into the fourth memory. Similarly, even numbered rows of pixels in the fourth and fifth memories are serially shifted into the fifth and sixth memories, respectively, while odd numbered rows of pixels are being written into the first memory. The outputs of all of the memories are multiplexed into three bit serial to parallel converters. The nine outputs of the three serial-to-parallel converters produce nine bit pixel neighborhoods each centered about a successive object pixel at the ten MHz data rate. The nine bit pixel neighborhoods are gated into a read only memory that st…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.