Pattern detection in two dimensional signals
US4797941A · kind A · utility
Inventors
Key dates
| Filing date | Jul 1, 1986 |
| Grant date | Jan 10, 1989 |
| Priority date | — |
| Expiry date | Jul 1, 2006 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06V10/7515
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Detection of a pattern feature in a two dimensional signal e.g. as produced by scanning a linear array of detectors, is performed by apparatus 20 (FIG. 3) comprising an M.times.N array 21 of serial input shift registers 40 in which the signal, digitized to binary level samples and on M channels, is stored. Sampling and input occur at timing intervals controlled by timing means 29, previous samples being shifted one stage through the registers. Pattern features each comprising a binary level pattern formed on an M.times.N element map of the array and comprising only one element per row, are encoded as sets of M binary address words defining shift register addresses in M.log.sub.2 N-bit template words stored in ROM 23'. A ROM address register 33' points to a ROM location and extracts a template word on bus 25 which comprises M.log.sub.2 N lines so that all the address words are extracted in parallel. A 1-out of-N data selector connected to parallel outputs of each shift register is addressed by its own log.sub.2 N lines of bus 25 and in accordance with the value of the address word outputs the state of the appropriate shift register stage. The selectors produce outputs simultaneously…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.