Electronic circuit constituting an improved high-speed stable memory with memory zones protect from overlap
US4799186A · kind A · utility
12Cited by
1References
22Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 12, 1986 |
| Grant date | Jan 17, 1989 |
| Priority date | — |
| Expiry date | Dec 12, 2006 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/1425
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The stable memory (2) includes an interface (30) for communication with an allocated processor (1). It includes two memory banks (51, 52) for containing the same information at each address. The interface (b 30) interchanges addresses and commands with the memory banks via an access logic conroller or filter (20). Data interchanges pass via a switching and comparator member (40). The information contained in the memory banks (51, 52) is structured in the form of objects which are rendered indivisible by use of a chaining vector which is established and verified by the logic controller (20).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.