Two-terminal semiconductor diode arrangement
US4800420A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 14, 1987 |
| Grant date | Jan 24, 1989 |
| Priority date | — |
| Expiry date | May 14, 2007 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A two-terminal semiconductor diode device and method for manufacturing the same is disclosed. The semiconductor diode geometry is defined by mesa etching. An ohmic contact is disposed on the flat topped summit of the mesa and another ohmic contact in the shape of a ring is disposed on the bottom layer of the diode. A dielectric layer disposed over the diode has a via hole therethrough to make external contact to a metallic heat sink and ground. A substrate layer supports the semiconductor diode and has a second offset via hole therethrough to the ring contact for external circuit contact and biasing of the diode. The offset via hole simplifies the manufacturing process. Additionally, the active area of the diode makes direct contact to the heat sink improving heat transfer from the device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.