Three level state logic circuit having improved high voltage to high output impedance transition
US4801825A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 6, 1987 |
| Grant date | Jan 31, 1989 |
| Priority date | — |
| Expiry date | Jul 6, 2007 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/0136
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit is provided which comprises a push-pull switching stage responsive to applied control signals for alternately establishing high and low output voltage levels at an output of the circuit responsive to control signals which are derived from an applied input logic signal and which is disabled in response to the control signals being disabled for providing a high output impedance at the output. The circuit includes circuitry responsive to an applied disable signal for disabling the control signals while enabling further circuitry, the latter providing a transient current path to improve the transition from the high voltage output level to the high output impedance condition while establishing a pseudo high output impedance at the output of the circuit until the push-pull stage is disabled.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.