High packing density lead frame and integrated circuit
US4801997A · kind A · utility
20Cited by
4References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 19, 1988 |
| Grant date | Jan 31, 1989 |
| Priority date | — |
| Expiry date | Apr 19, 2008 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/48247
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Lead frame for mounting a semiconductor chip and improving the packing density of devices such as a plastic chip carrier type IC is disclosed. A portion of inner leads, located parallel to the chip stage and the edge of a molded case is made as thin as possible and held by inner lead supporting bars to tie bars until the molding process is finished. After molding process is finished, these bars supporting the leads and stage are cut away. Packing density is improved an amount ranging from 20% to 30%.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.