Decoding apparatus
US4802172A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 27, 1987 |
| Grant date | Jan 31, 1989 |
| Priority date | — |
| Expiry date | Feb 27, 2007 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11B20/10527
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A decoding apparatus in which the operation to write error correction coded data into a memory and a decoding processing operation of the data read out of the memory are executed in parallel. This decoding apparatus comprises: a comparator for comparing the address to write the data into the memory with the address in the memory for the decoding processing operation; and control means for inhibiting the writing operation when it is detected by the comparator that the decoding processing operation is precedent to the writing operation. With this apparatus, the data which was subjected to the correcting process is prevented from being rewritten into the memory and the pointer derived by the decoding process from being broken.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.