Multiprocessor system having common memory
US4803618A · kind A · utility
23Cited by
10References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 17, 1986 |
| Grant date | Feb 7, 1989 |
| Priority date | — |
| Expiry date | Jan 17, 2006 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/167
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A plurality of processors use a common memory under a time division control mode by way of a time division data bus. In the multiprocessor system, flip-flops are mounted for holding respective write permission flags. Also, a logic gate is employed, operative to allow the processor to write data in the common memory when both the write permission flag and the write request signal from the processor are generated simultaneously. Further, multiplexers are used so that the write operation can be achieved under the time division control mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.