Method of manufacture of galluim arsenide field effect transistors
US4804635A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Mar 11, 1985 |
| Grant date | Feb 14, 1989 |
| Priority date | — |
| Expiry date | Mar 11, 2005 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/64
Abstract
A self-aligned gate structure for a compound semiconductor MESFET is formed rom a lower silicon layer and an upper metal, e.g. nickel, region. The nickel region forms an etch mask for the silicon and subsequently an implantation mask for the drain and source regions. Etching of the silicon provides an undercut whereby the gate separation from the drain and source is defined. Heating the structure to anneal the implant diffuses the metal into the silicon to form a compound silicide gate structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.