Digital double demodulator
US4804924A · kind A · utility
6Cited by
1References
4Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | Oct 27, 1987 |
| Grant date | Feb 14, 1989 |
| Priority date | — |
| Expiry date | Oct 27, 2007 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03D2200/008
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A demodulator including a Hilbert transformer (20), a carrier regenerating circuit (30), a first delay line (35), a second delay line (36), a first switching device (38), a second switching device (39), a first multiplier (40), a second multiplier (42), a second adder (44), a third switching device (46), a third multiplier (48), a fourth switching device (50), a fourth multiplier (52), a second adder (54) and a divider circuit (60). This demodulator is able to demodulate either a frequency modulated signal, or a signal with double amplitude modulation in quadrature and with suppressed carrier.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.