Electronic circuit for extending the addressing capacity of a processor
US4805092A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 30, 1986 |
| Grant date | Feb 14, 1989 |
| Priority date | — |
| Expiry date | Apr 30, 2006 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0292
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The electronic circuit connects a processor to a high-capacity memory of 1 Megabyte. The processor may be of the 8 bit type, with a 16 bit address bus (A0-A15). The memory is subdivided into 256 segments each having a capacity of 4 Kbytes which can be directly addressed by the processor by means of 12 (A0-A11) of the 16 lines of the address bus. An auxiliary RAM is interposed between the processor and has 1 Mbyte memory and comprises sixteen 8 bit registers (R0-R15), which can be addressed by means of the other four lines (A12-A15), of the address bus. By means of the 8 bit data bus (D0-D7), the 16 registers of the RAM store the numbers of those 16 segments out of the 256 segments of the 1 Mbyte memory, which from time to time are connected to the processor. In this way the processor, while being able to address only 64 Kbytes of memory at a time, has the whole of the 1 Mbyte memory available. The circuit can be applied to data processing and word processing units and electronic typewriters.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.