Integrated circuit electrostatic discharge input protection
US4807080A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 15, 1987 |
| Grant date | Feb 21, 1989 |
| Priority date | — |
| Expiry date | Jun 15, 2007 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/811
Abstract
Protection of the thin gate oxide of MOS field effect transistors from irreversible puncture due to undesired high voltages and currents generated by electrostatic discharge through handling or otherwise, is provided by a circuit structure at each input pad of an integrated circuit chip. One such feature includes the use of a barrier layer of polysilicon material to make an electrical contact between source and drain diffusions of a protective transistor and their respective aluminum conductors, in order to increase the amount of current that can be handled at such contacts without the aluminum conductor fusing though a diffusion into the substrate. Another such feature is to provide an initial, and perhaps only, protective transistor that has a very narrow channel between source and drain diffusions to allow a reversible breakdown to reduce the voltage across it to within, or nearly within, the maximum voltage that the protected thin gate oxide transistor can handle without being damaged. Further, current concentrations in the protective transistor are minimized by the use of elongated diffusions and associated solid elongated conductors having rounded corners.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.